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AbiralArch/hardware-cvdp-examples
Updated
Aug 1, 2025
•
26
AbiralArch/hardware-verilogeval-v2
Viewer
•
Updated
Aug 1, 2025
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471
•
42
AbiralArch/hardware-shailja-vgen
Viewer
•
Updated
Aug 1, 2025
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87
•
25
AbiralArch/hardware-cvdp-complete
Updated
Aug 1, 2025
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68
•
1
xxrjun/rtllm-variants
Viewer
•
Updated
Mar 6
•
50
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4
architect-ubc-capstone/rtl-augmented
Updated
Mar 20
•
127
architect-ubc-capstone/rtl-augmented-v2
Updated
Mar 23
•
281
architect-ubc-capstone/rtl-augmented-v3
Updated
Apr 14
•
248
VN-26/rtl-llm-dataset
Updated
Mar 30
•
36
Adel9st/Verilog-Turkish-Dataset
Updated
Apr 22
•
33
billshockley/titanbench
Updated
May 7
•
63
vyomaalabs/verixa-dataset
Viewer
•
Updated
May 30
•
105k
•
23
KSU-HW-SEC/SynthAgentic-Eval
Updated
May 10
•
130
Rajasrl/VLSI-Dataset
Updated
May 13
•
8
EvanOLeary/rtllm-shinka-evolve
Viewer
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Updated
Jun 17
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1.84k
•
65
•
1
Elinnos/elinnos-sv-v7-training-data
Viewer
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Updated
Jun 23
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818
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27
hasankursun/soc-builder-rtl-v1
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Updated
Jun 30
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5k
•
4.47k
•
2
aashay96/scientific-posttrain-rtl-formal-eval
Preview
•
Updated
18 days ago
•
26
nickh007/hw-verify
Viewer
•
Updated
6 days ago
•
49
•
69
theepicflyer/openrtlset-permissive-verified
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Updated
2 days ago
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13.6k
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20